# Improving the output signal of charge readout for quantum computing in electrostatically defined quantum dots with a new sensing dot concept

To facilitate scaleable quantum systems beyond the NISQ era, it is imperative to minimize the heat load of a qubit readout operation and provide a well scaleable readout periphery. Baseband readout, using transistor circuits in close proximity to the qubit, is a promising candidate for a well scaleable and low power consumption approach to this challenge. The sensing dot is currently the most sensitive sensor for readout in solid state spin qubits. However, in conventional sensing dots, the output swing is limited by negative feedback of a reservoir capacitance, which can capacitively shunt the charge signal. In this thesis, we theoretically develop and experimentally demonstrate a proximal charge sensor, termed ASD, that remedies this effect. In the ASD the source and drain reservoirs are arranged asymmetrically, so that the relevant reservoir capacitance is greatly reduced. We perform electrostatic simulations, in the context of electrostatically defined quantum dots in heterostructures and evaluate several gate layouts, with the goal to establish an ASD demonstrator layout. Since the ASD requires complex gate electrode shapes, we develop a software package, termed comsolkit, to aid in the gate layout creation process. We find a well tunable gate layout and estimate the drain capacitance reduction to be nearly 40 times, compared to a conventional sensing dot, when neglecting disorder or broadening effects. We perform measurements on several ASD samples, that validate the ASD concept, by reducing the drain capacitance by a factor of $13\pm 1$ at a bias of $V_{SD}\geq 4.5\,\text{mV}$. We also demonstrate successful charge readout of a nearby qubit-like double dot, using the current biased ASD, achieving a $(3.0\pm 0.2)\,\text{mV}$ voltage swing, in distinguishing the two relevant charge states, which substantially improves the response compared to conventional sensing dots. We perform simulations to estimate the benefits of the ASD in a baseband readout configuration, for different transistor technologies and implementation scenarios.The ASD achieves sensitivities of $4\,\mu e/\sqrt{\text{Hz}}$ at MHz bandwidths, for a high integration scenario and realistic transistor parameters, extracted from cold transistor characterization measurements, when excluding $1/f$ transistor noise, which is comparable to highly sensitive superconducting RF-SETs. Including a conservative FET $1/f$ noise model, the ASD achieves $82\,\mu e/\sqrt{\text{Hz}}$, which is competitive with RF-SET readout.